OBJECTIVE:  A leadership role utilizing my business and engineering skills to drive company level goals in order to maximize impact to the bottom line.


  • Experience managing new product introduction from prototype to mass production.
  • Effective cross-functional communication with design, process, test, quality, and sales groups.
  • Results-oriented and customer-focused, providing immediate resolution to issues.
  • In-depth and working knowledge of assembly processes, mechanical / electrical engineering, and IC technology;13+ years of practical engineering experience in design and product validation.


 ADVANCE DISPLAY TECHNOLOGIES – Temecula, CA (2009 – 2013)

Director of Electrical Engineering / Principal EngineerManaged electrical engineering activities to provide design, analysis, and validation of component to system level designs. Established and maintained company’s quality management system (QMS).

  • Managed electrical engineer, firmware engineer, technician, third party engineering firm, and document control in design, prototyping, production, and troubleshooting activities.
  • Developed and established the quality management system (QMS) to ISO9001:2008 standards.  Management Representative and instrumental driver in obtaining company certification within 6 months of employment.
  • Instrumental driver in obtaining Intertek ETL certification to UL and CSA safety standards for Electric Signs, which allowed for sales and installation within the US and EU.
  • Responsible for annual ISO audits, Intertek audits, and associated findings and corrective actions.
  • Coordinated with Power hub and printed circuit assembly (PCA) suppliers on design, AVL, and corrective/preventive actions.

MAGNECOMP CORPORATION – Temecula, CA (2005 – 2009)

Lead Electrical Engineer – Modeling & Test – Managed and led Electrical Group activities to provide design, analysis, and validation of new circuit constructions using modeling tools and test equipment.

  • Utilized AutoCAD, SolidWorks, EM simulator (CST Microwave Studio), and circuit simulations (Ansoft Designer) to analyze and verify various circuit designs; Developed and trained engineers as they gained proficiency in these tools.
  • Developed design spaces for future circuit configurations by creating / modifying coupon designs to run in simulations that would meet future performance trends; Learning applied to developing product designs.
  • Optimized circuit designs to meet differential impedance and bandwidth requirements.

Senior Product Engineer / Program Manager – Delivered state-of-the-art data storage products on time.  Maintained formal documentation & drawings; Handled engineering change processes for design, specs, BOMs, etc.

  • Communicated with overseas manufacturing facilities, suppliers / vendors, and internal engineering resources to drive DFM (design for manufacturing), negotiate tolerances / specs, and freeze designs.
  • Prepared and delivered First Article data packages to customer for Qualification and AVL status.
  • Coordinated Cpk improvement plans, closure of corrective action requests, and yield improvement which increased mobile product volumes to 20M/quarter, accounting for 20% of overall company’s business.
  • First engineer to successfully qualify TSA product (80G platform) with key HDD client.

READ-RITE CORPORATION – Fremont, CA (1997 – 2002)

Senior Product Engineer – Ensured delivery of quality product on time.  Worked with customers to validate product specs and resolve technical issues.  Interfaced with design, process, test, and QA in accordance with ISO regulations.

Traveled overseas for product transfer to high volume, high yield mass production.  Managed projects involving product characterization and experiments, including technician instruction and goal setting.  Provided written and oral presentation of results, often leading to design optimization.

  • Launched products successfully and smoothly, earning promotions from Associate to Senior level in 3.5 yrs.
  • Received recognition award (July 1999) for engineering analysis of read/write heads that provided optimized screening methods for track widths.

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